-- Copyright © 1993 by  McGraw-Hill, Inc. and Zainalabedin Navabi

-- FIGURE 7.15 




-- ENTITY DECLERATION OF POSITIVE EDGE TRIGGER FLIPFLOP :

ENTITY de_flipflop IS
  GENERIC (delay1 : TIME := 4 NS; delay2 : TIME := 5 NS);
  PORT (d, e, c : IN BIT; q, qb : OUT BIT);
END de_flipflop;
--



-- THE GUARDING ARCHITECTURE FOR POSITIVE EDGE TRIGGER FLIPFLOP :

ARCHITECTURE guarding OF de_flipflop IS
BEGIN
  ff: BLOCK ( c = '1' AND NOT c'STABLE )
  BEGIN
    ee: BLOCK ( e = '1' AND GUARD )
    BEGIN
      q <= GUARDED d AFTER delay1;
      qb <= GUARDED NOT d AFTER delay2;
    END BLOCK ee;
  END BLOCK ff;
END guarding;
--