LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY mc8051 ;
USE mc8051.synth_pack.all;

ENTITY pc_chg IS
   PORT( 
      cmp_true : IN     std_logic ;
      cycle_states : IN     std_logic_vector( 3 DOWNTO 0 )  ;
      dptr : IN     std_logic_vector( 15 DOWNTO 0 )  ;
      int_clk : IN     std_logic ;
      int_rst : IN     std_logic ;
      ir : IN     std_logic_vector( 7 DOWNTO 0 )  ;
      last_cycle : IN     std_logic ;
      new_ir : IN     std_logic ;
      pc : IN     std_logic_vector( 15 DOWNTO 0 )  ;
      pmem1 : IN     std_logic_vector( 7 DOWNTO 0 )  ;
      pmem2 : IN     std_logic_vector( 7 DOWNTO 0 )  ;
      addr_gb : OUT    std_logic_vector( 7 DOWNTO 0 )  ;
      dec_rd_sp : OUT    std_logic ;
      inc_wr_sp : OUT    std_logic ;
      indirect_sel : OUT    std_logic ;
      new_pc : OUT    std_logic_vector( 15 DOWNTO 0 )  ;
      rd_gb : OUT    std_logic ;
      wr_gb : OUT    std_logic ;
      wr_pc : OUT    std_logic ;
      acknow : INOUT  std_logic ;
      data_gb : INOUT  std_logic_vector( 7 DOWNTO 0 ) 
   );

-- Declarations

END pc_chg ;

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