DESIGN CROSS-REFERENCE FILE
---------------------------

Design: lfsr, XNFMAP Ver 5.1.0 run at Sun Apr  9 17:24:47 1995

CHECKING NETWORK FOR LOGICAL ERRORS:
------------------------------------

PREPARING DESIGN:
-----------------

ASSIGNMENT OF LOGIC TO LCA ELEMENTS:
------------------------------------

	1. Register-Ordering on Clock Signal 'N68'
	------------------------------------------
	DFF 'Q_REG<0>/$1I13' paired with DFF 'Q_REG<1>/$1I13'
	   (Q pin signals 'Q38<1>' and 'Q38<2>')

CHECKING MAPPED LOGIC BLOCKS:
-----------------------------


DESIGN SUMMARY:
--------------
	Part type=3042PC84-50
	3 of 144 CLBs used
	6 of 74 I/O pins used
	0 of 22 internal IOBs used
	0 of 24 internal three-state signals used (0 TBUFS used)

	4   CLB flipflops used

	Total number of WARNINGS generated during mapping = 0.
	Total number of ERRORS generated during mapping = 0.

WARNING 356:  The following IOBs could not be named using
the IO pad name, since that name conflicts with a reserved 
LCA name or was used as a name for another block.
These IO signals will appear in APR, PPR, and XDELAY reports
with the alternate IOB names shown below.

  PAD = CE
  IOB Name = N39<0>


CLB CROSS-REFERENCE REPORT:
--------------------------

  CLB #1  Name = 'N78'

	QX = signal 'N78',
		latch = symbol 'Q_REG<3>/$1I13'
	F = signal 'Q38<3>'
		function contains:
		<no symbols - direct connection>

  CLB #2  Name = 'Q38<3>'

	QX = signal 'Q38<3>',
		latch = symbol 'Q_REG<2>/$1I13'
	F = signal 'Q38<2>'
		function contains:
		<no symbols - direct connection>

  CLB #3  Name = 'Q38<2>'

	QX = signal 'Q38<2>',
		latch = symbol 'Q_REG<1>/$1I13'
	QY = signal 'Q38<1>',
		latch = symbol 'Q_REG<0>/$1I13'
	F = signal 'Q38<1>'
		function contains:
		<no symbols - direct connection>
	G = signal 'Q38<0>'
		function contains:
		symbol 'U29/$1I7' (type=XNOR),
		   output signal = 'Q38<0>'

IOB CROSS-REFERENCE REPORT:
--------------------------

  IOB #1: Name = 'Q<3>'

	Defined by signal 'Q<3>'
	O  = signal 'N78'

  IOB #2: Name = 'Q<2>'

	Defined by signal 'Q<2>'
	O  = signal 'Q38<3>'

  IOB #3: Name = 'Q<1>'

	Defined by signal 'Q<1>'
	O  = signal 'Q38<2>'

  IOB #4: Name = 'Q<0>'

	Defined by signal 'Q<0>'
	O  = signal 'Q38<1>'

  IOB #5: Name = 'CLK'

	Defined by signal 'CLK'

  IOB #6: Name = 'N39<0>'

	Defined by signal 'CE'
	I  = signal 'N39<0>'