entity ap_a_04 is end entity ap_a_04; library ieee; use ieee.std_logic_1164.all; architecture test of ap_a_04 is signal a, b, y : std_ulogic; begin -- code from book y <= a or b; -- end code from book a <= '0', '1' after 10 ns; b <= '0', '1' after 5 ns, '0' after 10 ns, '1' after 15 ns; end architecture test; <div align="center"><br /><script type="text/javascript"><!-- google_ad_client = "pub-7293844627074885"; //468x60, Created at 07. 11. 25 google_ad_slot = "8619794253"; google_ad_width = 468; google_ad_height = 60; //--></script> <script type="text/javascript" src="http://pagead2.googlesyndication.com/pagead/show_ads.js"> </script><br /> </div>