Quartus

Ignored Decrease Input Delay To Input Register logic option on pin <name> -- device does not support the decrease input delay option on pins not associated with a Fast Input Register

CAUSE: The Quartus II software is ignoring the Decrease Input Delay To Input Register logic option on the specified pin because the selected device does not support this option on pins not associated with a Fast Input Register, and the pin is not a Fast Input Register pin.
ACTION: Remove the delay chain assignment or turn on the Fast Input Register logic option for that pin.

See also:

Overview: Making Assignments

- PLDWorld -

 
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