| CAUSE: | You directed the Fitter to try to use registers in I/O cells (rather than registers in regular logic cells) to meet timing requirements and assignments that relate to I/O pins, but you also assigned the nodes listed in the submessages to a LogicLock region or custom region. As a result, the Fitter did not try to optimize I/O cell register placement for timing for these nodes. |
| ACTION: | No action is required. If you want the Fitter to optimize I/O cell register placement for these nodes, use the Assignment Organizer dialog box to delete the LogicLock region or custom region assignments and turn on the Prevent Assignment to LogicLock Regions logic option on these nodes. |
See also:
More Details About Assigning an Entity or Node to a LogicLock Region
Overview: Making Assignments
Specifying Compiler Settings for Timing-Driven Compilation
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