-- -- Rcsid[] = "$Id: gl85.vec,v 2.1 1993/10/06 01:04:36 alex Exp $"; -- --CSTRRRIRRH DDDDDDDD --LIRSSSNEEO IIIIIIII --KDATTTTASL NNNNNNNN -- P765RDED 76543210 -- 555 YT -- I -- N -- B -- A -- R -- 0000000100 00000000 000000011 100000011 000000011 -- Begin some NOOPs 1 0 1 0 1 0 -- Vec 10 1 0 1 0 1 0 1 0 1 0 -- Vec 20 1 0 1 0 1 0 1 0 1 0 -- Vec 30 1 0 1 0 1 0 1 0 1 0 -- Vec 40 1 0 1 0 1 0 1 0 1 0 -- Vec 50 1 0 1 0 1 0 1 0 1 0 -- Vec 60 1 0 1 0 1 0 1 -- End of NOOPs 0000000110 00000001 -- LXI BC,16data (OP-Code = H'01) 1 0 -- Vec 70 1 0 1 0 1 0000000110 11000011 -- byte 2 goes into Reg. C (the low order reg.) 1 0 1 0 -- Vec 80 1 0000000110 01101001 -- byte 3 goes into Reg. B (the high order reg.) 1 0 1 0 1 0000000110 00010001 -- LXI DE,16data (OP-Code = H'11) 1 0 -- Vec 90 1 0 1 0 1 0000000110 11000011 1 0 1 0 -- Vec 100 1 0000000110 01101001 1 0 1 0 1 0000000110 00100001 -- LXI HL,16data (OP-Code = H'21) 1 0 -- Vec 110 1 0 1 0 1 0000000110 11000011 1 0 1 0 -- Vec 120 1 0000000110 01101001 1 0 1 0 1 0000000110 00110001 -- LXI SP,16data (OP-Code = H'31) 1 0 -- Vec 130 1 0 1 0 1 0000000110 10111111 -- First byte = H'BF 1 0 1 0 -- Vec 140 1 0000000110 11111111 -- Second byte = H'FF 1 0 1 0 1 0000000110 11000101 -- PUSH BC 1 -- push requires 12 cycles in the 8085 microprocessor 0 -- Vec 150 1 0 1 0 1 0 1 0 1 0 -- Vec 160 1 0 1 0 1 0 1 0 1 0 -- Vec 170 1 0000000110 11010101 -- PUSH DE 1 0 1 0 1 0 1 0 -- Vec 180 1 0 1 0 1 0 1 0 1 0 -- Vec 190 1 0 1 0 1 0000000110 11100101 -- PUSH HL 1 0 1 0 -- Vec 200 1 0 1 0 1 0 1 0 1 0 -- Vec 210 1 0 1 0 1 0 1 0 1 0000000110 11110101 -- PUSH PSW 1 0 1 0 1 0 1 0 1 0 -- Vec 230 1 0 1 0 1 0 1 0 1 0 -- Vec 240 1 0 1 0000000110 11000001 -- POP BC 1 0 1 0 1 0 -- Vec 250 1 0000000110 10101010 -- pop into Reg. C 1 0 1 0 1 0000000110 01010101 -- pop into Reg. B 1 0 -- Vec 260 1 0 1 0000000110 11010001 -- POP DE 1 0 1 0 1 0 -- Vec 270 1 0000000110 10101010 -- pop into Reg. E 1 0 1 0 1 0000000110 01010101 -- pop into Reg. D 1 0 -- Vec 280 1 0 1 0000000110 11100001 -- POP HL 1 0 1 0 1 0 -- Vec 290 1 0000000110 10101010 -- pop into Reg. L 1 0 1 0 1 0000000110 01010101 -- pop into Reg. H 1 0 -- Vec 300 1 0 1 0000000110 11110001 -- POP PSW 1 0 1 0 1 0 -- Vec 310 1 0000000110 10101010 -- pop into Flags 1 0 1 0 1 0000000110 01111110 -- pop into Accumulator 1 0 -- Vec 320 1 0 1 0000000110 00000001 -- LXI BC,16data (OP-Code = H'01) 1 0 1 0 1 0 -- Vec 330 1 0000000110 11000011 -- byte 2 goes into Reg. C (the low order reg.) 1 0 1 0 1 0000000110 01101001 -- byte 3 goes into Reg. B (the high order reg.) 1 0 -- Vec 340 1 0 1 -- -- 0000000110 00000110 -- MVI B,data (OP-Code = H'06) 1 0 1 0 1 0 -- Vec 350 1 0000000110 00101000 -- byte 2 is the data (H'28) 1 0 1 0 1 0000000110 00001110 -- MVI C,data (OP-Code = H'0E) 1 0 1 0 1 0 1 0000000110 11011001 -- byte 2 is the data (H'D9) 1 0 1 0 1 0000000110 00010110 -- MVI D,data (OP-Code = H'16) 1 0 1 0 1 0 1 0000000110 01011111 -- byte 2 is the data (H'5F) 1 0 1 0 1 0000000110 00011110 -- MVI E,data (OP-Code = H'1E) 1 0 1 0 1 0 1 0000000110 01110110 -- byte 2 is the data (H'76) 1 0 1 0 1 0000000110 00100110 -- MVI H,data (OP-Code = H'26) 1 0 1 0 1 0 1 0000000110 00000100 -- byte 2 is the data (H'04) 1 0 1 0 1 0000000110 00101110 -- MVI L,data (OP-Code = H'2E) 1 0 1 0 1 0 1 0000000110 10111000 -- byte 2 is the data (H'B8) 1 0 1 0 1 0000000110 00111110 -- MVI A,data (OP-Code = H'3E) 1 0 1 0 1 0 1 0000000110 11101011 -- byte 2 is the data (H'EB) 1 0 1 0 1 0000000110 10000000 -- ADD B 1 -- One M-cycle 0 -- Four t-states 1 -- instruction completes on TSTATE = 2 of next instruction 0 1 0 1 0000000110 10110010 -- OR D 1 -- One M-cycle 0 -- Four t-states 1 -- instruction completes on TSTATE = 2 of next instruction 0 1 0 1 0000000110 10100011 -- AND E 1 -- One M-cycle 0 -- Four t-states 1 -- instruction completes on TSTATE = 2 of next instruction 0 1 0 1 0000000110 01100101 -- MOV H,L (move reg. L to reg. H) 1 0 1 0 1 0 1 0000000110 01110101 -- MOV M,H (move reg. H to memory) 1 -- memory location is contents of H,L regs. 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 00100001 -- LXI HL,16data (OP-Code = H'21) 1 0 1 0 1 0 1 0000000110 01000111 1 0 1 0 1 0000000110 01000111 1 0 1 0 1 0000000110 01110011 -- MOV M,E (move reg. E to memory) 1 -- memory location is contents of H,L regs. 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 01100110 -- MOV H,M (move memory to reg. H) 1 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 01101110 -- MOV L,M (move memory to reg. L) 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 01110001 -- MOV M,C (move reg. C to memory) 1 -- memory location is contents of H,L regs. 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 10010000 -- SUB B 1 -- One M-cycle 0 -- Four t-states 1 -- instruction completes on TSTATE = 2 of next instruction 0 1 0 1 0000000110 10001011 -- ADC E 1 -- One M-cycle 0 -- Four t-states 1 -- instruction completes on TSTATE = 2 of next instruction 0 1 0 1 0000000110 10011010 -- SBB D 1 -- One M-cycle 0 -- Four t-states 1 -- instruction completes on TSTATE = 2 of next instruction 0 1 0 1 0000000110 10101001 -- XRA C 1 -- One M-cycle 0 -- Four t-states 1 -- instruction completes on TSTATE = 2 of next instruction 0 1 0 1 0000000110 00110010 -- STA 1 0 1 0 1 0 1 0000000110 11111111 -- Low order byte of address for STA 1 0 1 0 1 0000000110 11111111 -- High order byte of address for STA 1 0 1 0 1 0 -- Fourth M-cycle puts Accumulator out onto Data Bus 1 0 1 0 1 -- -- 0000000110 00111110 -- MVI A,data (OP-Code = H'3E) 1 0 1 0 1 0 1 0000000110 00111000 -- byte 2 is the data (H'38) 1 0 1 0 1 0000000110 10000001 -- ADD C 1 -- One M-cycle 0 -- Four t-states 1 0 1 0 1 0000000110 00110010 -- STA 1 0 1 0 1 0 1 0000000110 00000000 -- Low order byte of address for STA 1 0 1 0 1 0000000110 00000000 -- High order byte of address for STA 1 0 1 0 1 0 -- Fourth M-cycle puts Accumulator out onto Data Bus 1 0 1 0 1 -- -- 0000000110 00111110 -- MVI A,data (OP-Code = H'3E) 1 0 1 0 1 0 1 0000000110 11111111 -- byte 2 is the data (H'FF) 1 0 1 0 1 0000000110 10100010 -- ANA D 1 -- One M-cycle 0 -- Four t-states 1 0 1 0 1 0000000110 00110010 -- STA 1 0 1 0 1 0 1 0000000110 00111100 -- Low order byte of address for STA 1 0 1 0 1 0000000110 11000011 -- High order byte of address for STA 1 0 1 0 1 0 -- Fourth M-cycle puts Accumulator out onto Data Bus 1 0 1 0 1 -- 0000000110 11111001 -- SPHL move HL to SP 1 0 1 0 1 0 1 0 1 0 1 -- 0000000110 00100001 -- LXI HL,16data (OP-Code = H'21) 1 0 1 0 1 0 1 0000000110 00100100 1 0 1 0 1 0000000110 01001000 1 0 1 0 1 -- 0000000110 00111110 -- MVI A,data (OP-Code = H'3E) 1 0 1 0 1 0 1 0000000110 00111000 -- byte 2 is the data (H'38) 1 0 1 0 1 0000000110 10110011 -- OR E 1 -- One M-cycle 0 -- Four t-states 1 0 1 0 1 0000000110 00110010 -- STA 1 0 1 0 1 0 1 0000000110 00001111 -- Low order byte of address for STA 1 0 1 0 1 0000000110 11110000 -- High order byte of address for STA 1 0 1 0 1 0 -- Fourth M-cycle puts Accumulator out onto Data Bus 1 0 1 0 1 -- 0000000110 11010101 -- PUSH DE 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 -- 0000000110 01110000 -- MOV M,B (move reg. B contents to memory) 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 01110001 -- MOV M,C (move reg. C contents to memory) 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 01110010 -- MOV M,D (move reg. D contents to memory) 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 01110011 -- MOV M,E (move reg. E contents to memory) 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 01110100 -- MOV M,H (move reg. H contents to memory) 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 01110101 -- MOV M,L (move reg. L contents to memory) 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 00010111 -- RAL rotate left through carry 1 0 1 0 1 0 1 0000000110 00110111 -- STC Set Carry to 1 1 0 1 0 1 0 1 0000000110 00111111 -- CMC Complement Carry 1 0 1 0 1 0 1 0000000110 00111111 -- CMC Complement Carry 1 0 1 0 1 0 1 0000000110 00101111 -- CMA Complement accumulator 1 0 1 0 1 0 1 0000000110 01110111 -- MOV M,A (move accumulator contents to memory) 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 00100001 -- LXI HL,16data (OP-Code = H'21) 1 0 1 0 1 0 1 0000000110 11111110 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 11101001 -- PCHL move HL to PC 1 0 1 0 1 0 1 0 1 0 1 0000000110 01110110 -- HLT 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000100 00000000 -- RESET 000000011 100000011 0000000110 00100001 -- LXI HL,16data (OP-Code = H'21) 1 0 1 0 1 0 1 0000000110 11111110 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 11101001 -- PCHL move HL to PC 1 0 1 0 1 0 1 0 1 0 1 0000000110 11111001 -- SPHL move HL to SP 1 0 1 0 1 0 1 0 1 0 1 0000000110 00100001 -- LXI HL,16data (OP-Code = H'21) 1 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 10000110 -- ADD M 1 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 10010110 -- SUB M 1 0 1 0 1 0 1 0000000110 00110011 1 0 1 0 1 0000000110 10100110 -- ANA M 1 0 1 0 1 0 1 0000000110 01111101 1 0 1 0 1 0000000110 10110110 -- ORA M 1 0 1 0 1 0 1 0000000110 00010000 1 0 1 0 1 0000000110 10001110 -- ADC M 1 0 1 0 1 0 1 0000000110 00000011 1 0 1 0 1 0000000110 10011110 -- SBB M 1 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 10101110 -- XRA M 1 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 10111110 -- CMP M 1 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 00101010 -- LHLD addr (OP-Code = H'2A) 1 0 1 0 1 0 1 0000000110 00111010 1 0 1 0 1 0000000110 11000101 1 0 1 0 1 0000000110 00111010 1 0 1 0 1 0000000110 11000101 1 0 1 0 1 0000000110 00100010 -- SHLD addr (OP-Code = H'22) 1 0 1 0 1 0 1 0000000110 10110011 1 0 1 0 1 0000000110 10111101 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 11000110 -- ADI (Add Immediate) 1 0 1 0 1 0 1 0000000110 00000101 1 0 1 0 1 0000000110 11111110 -- CPI compare immediate 1 0 1 0 1 0 1 0000000110 11100010 1 0 1 0 1 0000000110 11010010 -- JC jump on condition (sign bit) 1 0 1 0 1 0 1 0000000110 00111110 1 0 1 0 1 0000000110 01100110 1 0 1 0 1 0000000110 11111110 -- CPI compare immediate 1 0 1 0 1 0 1 0000000110 00000010 1 0 1 0 1 0000000110 11010010 -- JC jump on condition (sign bit) 1 0 1 0 1 0 1 0000000110 00111110 1 0 1 0 1 0000000110 01100110 1 0 1 0 1 0000000110 11001101 -- CALL 1 0 1 0 1 0 1 0 1 0 1 0000000110 00111110 1 0 1 0 1 0000000110 01100110 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 11001100 -- CALL Conditional 1 0 1 0 1 0 1 0 1 0 1 0000000110 00111110 1 0 1 0 1 0000000110 01100110 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 11101111 -- RST 5 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 11000011 -- JMP 1 0 1 0 1 0 1 0000000110 10100110 1 0 1 0 1 0000000110 01101011 1 0 1 0 1 0000000110 11001001 -- RET 1 0 1 0 1 0 1 0000000110 01011001 1 0 1 0 1 0000000110 10010100 1 0 1 0 1 0000000110 11011011 -- IN 1 0 1 0 1 0 1 0000000110 01110111 1 0 1 0 1 0000000110 01110111 1 0 1 0 1 0000000110 11010011 -- OUT 1 0 1 0 1 0 1 0000000110 01110111 1 0 1 0 1 0000000110 01110111 1 0 1 0 1 0000000110 11110011 -- DI disable interrupts 1 0 1 0 1 0 1 0000000110 11111011 -- EI disable interrupts 1 0 1 0 1 0 1 0000000110 11101011 -- XCHG exchange HL, DE 1 0 1 0 1 0 1 0000000110 11100011 -- XTHL exchange HL with top of stack 1 0 1 0 1 0 1 0000000110 10100011 1 0 1 0 1 0000000110 11001010 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 00100001 -- LXI HL,16data (OP-Code = H'21) 1 0 1 0 1 0 1 0000000110 00000000 1 0 1 0 1 0000000110 01000000 1 0 1 0 1 0000000110 00111101 -- DCR A decrement accumulator 1 0 1 0 1 0 1 0000000110 00100101 -- DCR H decrement accumulator 1 0 1 0 1 0 1 0000000110 00110101 -- DCR M decrement Memory 1 0 1 0 1 0 1 0000000110 00100101 1 0 1 0 1 0 1 0 1 0 1 0000000110 00100011 -- INX BC 1 0 1 0 1 0 1 0 1 0 1 0000000110 00111010 -- LDA 1 0 1 0 1 0 1 0000000110 00001001 -- Low order byte of address for LDA 1 0 1 0 1 0000000110 00001001 -- High order byte of address for LDA 1 0 1 0 1 0000000110 10011001 -- incoming byte for ACC 1 0 1 0 1 0000000110 00001001 -- DAD 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 00110110 -- MVI M,data (OP-Code = H'36) 1 0 1 0 1 0 1 0000000110 00111011 -- byte 2 is the data (H'3B) 1 0 1 0 1 0 1 0 1 0 1 0000000110 00010111 -- RAL rotate left through carry 1 0 1 0 1 0 1 0000000110 00000111 -- RLC 1 0 1 0 1 0 1 0000000110 00001111 -- RRC 1 0 1 0 1 0 1 0000000110 00010111 -- RAL 1 0 1 0 1 0 1 0000000110 00011111 -- RAR 1 0 1 0 1 0 1 0000000110 00010111 -- RAL 1 0 1 0 1 0 1 0000000110 00010111 -- RAL 1 0 1 0 1 0 1 0000000110 00100111 -- DAA 1 0 1 0 1 0 1 0000000110 00100010 -- SHLD addr (OP-Code = H'22) 1 0 1 0 1 0 1 0000000110 00000000 1 0 1 0 1 0000000110 00000000 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 00010001 -- LXI DE,16data (OP-Code = H'11) 1 0 1 0 1 0 1 0000000110 11000011 1 0 1 0 1 0000000110 01101001 1 0 1 0 1 0000000110 11101011 -- XCHG exchange H,L with D,E 1 0 1 0 1 0 1 0000000110 00100010 -- SHLD addr (OP-Code = H'22) 1 0 1 0 1 0 1 0000000110 00000000 1 0 1 0 1 0000000110 00000000 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000101 00000000 -- NOP 1 0 1 0 1 0 1 0 1 0111111101 00000000 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000100 00000000 000000011 100000011 0000000110 00000001 -- LXI BC,16data (OP-Code = H'01) 1 0 1 0 1 0 1 0000000110 11000011 -- byte 2 goes into Reg. C (the low order reg.) 1 0 1 0 1 0000000110 01101001 -- byte 3 goes into Reg. B (the high order reg.) 1 0 1 0 1 0000000110 00001011 -- DCX BC 1 0 1 0 1 0 1 0 1 0 1 0000000110 00010001 -- LXI DE,16data (OP-Code = H'11) 1 0 1 0 1 0 1 0000000110 11000011 1 0 1 0 1 0000000110 01101001 1 0 1 0 1 0000000110 00011011 -- DCX DE 1 0 1 0 1 0 1 0 1 0 1 0000000110 00100001 -- LXI HL,16data (OP-Code = H'21) 1 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 00000000 1 0 1 0 1 0000000110 00101011 -- DCX HL 1 0 1 0 1 0 1 0 1 0 1 0000000110 11101001 -- PCHL move HL to PC 1 0 1 0 1 0 1 0 1 0 1 0000000110 01111000 -- MOV A,B 1 0 1 0 1 0 1 0000000110 01110111 -- MOV M,A 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 01000001 -- MOV B,C 1 0 1 0 1 0 1 0000000110 01111000 -- MOV A,B 1 0 1 0 1 0 1 0000000110 01110111 -- MOV M,A 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 01001010 -- MOV C,D 1 0 1 0 1 0 1 0000000110 01111001 -- MOV A,C 1 0 1 0 1 0 1 0000000110 01110111 -- MOV M,A 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 01010011 -- MOV D,E 1 0 1 0 1 0 1 0000000110 01111011 -- MOV A,D 1 0 1 0 1 0 1 0000000110 01110111 -- MOV M,A 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 00111101 -- DCR A decrement accumulator 1 0 1 0 1 0 1 0000000110 00111101 -- DCR A decrement accumulator 1 0 1 0 1 0 1 0000000110 00111101 -- DCR A decrement accumulator 1 0 1 0 1 0 1 0000000110 00111101 -- DCR A decrement accumulator 1 0 1 0 1 0 1 0000000110 01110111 -- MOV M,A 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 11001001 -- RET 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 00000111 -- RLC rotate left 1 0 1 0 1 0 1 0000000110 01110111 -- MOV M,A 1 0 1 0 1 0 1 0 1 0 1 0 1 0000000110 11001000 -- (RC Return if result non-zero) 1 0 1 0 1 0 1 0 1 0 1 0000000110 11000000 -- (RC Return if result zero) 1 0 1 0 1 0 1 0 1 0 1 0000000110 01001110 -- 1st byte of conditional address 1 0 1 0 1 0000000110 00110111 -- 2nd byte of conditional address 1 0 1 0 1 0000000110 11110001 -- POP PSW 1 0 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 11111111 1 0 1 0 1 0000000110 11111000 -- (RC Return if result non-zero) 1 0 1 0 1 0 1 0 1 0 1 0000000110 11110000 -- (RC Return if result zero) 1 0 1 0 1 0 1 0000000110 01001110 -- 1st byte of conditional address 1 0 1 0 1 0000000110 00110111 -- 2nd byte of conditional address 1 0 1 0 1 <div align="center"><br /><script type="text/javascript"><!-- google_ad_client = "pub-7293844627074885"; //468x60, Created at 07. 11. 25 google_ad_slot = "8619794253"; google_ad_width = 468; google_ad_height = 60; //--></script> <script type="text/javascript" src="http://pagead2.googlesyndication.com/pagead/show_ads.js"> </script><br /> </div>