--
-- Dalton Project
-- Tony Givargis, Rilesh Patel, Deepa Varghese, Roman Lysecky
-- 12/21/98
-- Version 1.2
-- Notes: This file implement the MEMORY device.  This memory is word
--	  addressable only.
--

--**************************************************************************--

library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;

--**************************************************************************--

entity MEMORY is

	generic(MAX_MEM_SIZE : INTEGER := 290);

	port( clk  : in STD_LOGIC;
	      rst  : in STD_LOGIC;
	      data : inout UNSIGNED(31 downto 0); 
	      addr : in UNSIGNED(22 downto 0);
	      rd   : in STD_LOGIC;
              wr   : in STD_LOGIC );

end MEMORY;

--**************************************************************************--


architecture BHV_MEMORY of MEMORY is

	--
	-- type declarations
	--
	subtype MEM_CELL is UNSIGNED(31 downto 0);
	type MEM_TYPE is array(MAX_MEM_SIZE-1 downto 0) of MEM_CELL;

	--
	-- constant declarations
	--
	constant Z_32 : UNSIGNED(31 downto 0) := 
		"ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ";

	constant Z_23 : UNSIGNED(22 downto 0) :=
		"ZZZZZZZZZZZZZZZZZZZZZZZ";

	--
	-- signal declarations
	--
	signal memory : MEM_TYPE;

begin
	process( rst, clk )
	begin
		if (rst = '1') then
			
			--
			-- steady state
			--
			data <= Z_32;

		elsif ( clk'event and clk = '1' ) then
		
			--
			-- steady state
			--
			data <= Z_32;

			--
			-- otherwise
			--
			if( rd = '1' ) then

				if( conv_integer(addr) < MAX_MEM_SIZE ) then

					data<=memory(conv_integer(addr));
				end if;

			elsif( wr = '1' ) then

				if( conv_integer(addr) < MAX_MEM_SIZE ) then

					memory(conv_integer(addr))<=data;
				end if;
			else

				null;
			end if;
		end if;
	end process;
end BHV_MEMORY;

--**************************************************************************--

configuration CFG_MEMORY of MEMORY is
	for BHV_MEMORY
	end for;
end CFG_MEMORY;

--**************************************************************************--

-- end of file --