|  Introduction - The Need for Education
 |   | 
- In a survey of 71 US universities (representing about half of the  EE graduating seniors in 1993), they reported
- 44% have no training on or use of VHDL in any undergraduate EE course
 - 45% have no faculty members who can teach VHDL
 - 14% of the graduating seniors have a working knowledge of VHDL and only 8% know Verilog
 
 - However, in the 1994 USE/DA Standards Survey, 85% of the engineers surveyed were designers and reported
- 55% were familiar with EDIF
 - 55% were familiar with VHDL
 - 33% were familiar with Verilog
 
 
Copyright the User Society for Electronic Design Automation. Reprinted with permission.