Because VHDL is a rich language, there are several ways to say the
same thing. This example illustrates how the concurrent VHDL
statements shown on the left side (as procedure calls, actually) are
equivalent to the one-statement processes shown on the right. Note
that the "sensitivity list" for each process (actually shown as a
wait on statement at the end each process here) includes the
signals on the "right hand side" of the concurrent statement (which is
actually a procedure parameter in each of the concurrent statements
here). That is, the wait statements in the two processes synchronize
the process execution with external signal inputs.
