Queue System VHDL Model

-- Notes Page --


In this and the next few slides, we will describe the queuing system ADT and show how to use the ADT to create and exercise the model presented in the previous slide.

The queue_pkg package contains a number of functions useful for the queuing system component including overloaded read and write procedures.

Since we assume there are no system inputs and outputs, the entity open_system has no ports.

The architecture has three basic parts: 1) a signal list declaration which declares all signals used to connect the components together to create the queuing network, 2) the declarations of the queuing system components (i.e., sources, sink, forks, joins, queue, and servers), and 3) the body which here will be little more than a netlist of components.